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ltc4090-3 1 40903fb for more information www.linear.com/ltc4090-3 features applications description usb power manager with 2a high voltage bat-track buck regulator the lt c ? 4090-3 is a usb power manager plus high voltage li-ion/polymer battery charger. the device controls the total current used by the usb peripheral for operation and battery charging. battery charge current is automatically reduced such that the sum of the load current and the charge current does not exceed the programmed input current limit. the ltc4090-3 also accommodates high voltage power supplies, such as 12 v ac/dc wall adapters, firewire, or automotive power. the ltc4090 provides a bat-track adaptive output that tracks the battery voltage for high efficiency charging from the high voltage input. this 3.95 v version of the standard ltc4090 is intended for applications which have extended battery lifetime requirements or those that require high temperature (>60 c) operation or storage under these conditions. a reduced float voltage will trade off initial cell capacity for the benefit of increased capacity retention over the life of the battery. the charge current is programmable and an end - of - charge status output ( chrg ) indicates full charge. n seamless transition between power sources: li-ion battery, usb, and 6v to 36v supply (60v max) n 2a output high voltage buck regulator with bat-track? adaptive output control n 3.95v float voltage improves battery life span and high temperature safety margin n internal 215m ideal diode plus optional external ideal diode controller provides low loss powerpath? when external supply/ usb not present n load dependent charging from usb input guaran-tees current compliance n full featured li-ion battery charger n 1.5a maximum charge current with thermal limiting n ntc thermistor input for temperature quali?ed charging n tiny (3mm 6mm 0.75mm) 22-pin dfn package n embedded automotive accessories n personal navigation devices n other usb-based handheld products hvin boost in sw 4.7f 22f 4.7f 1f timer clprog ltc4090-3 gnd prog hvout hvpr out bat 0.1f 270pf 100k 2k 5v wall adapter usb high (7.5v-36v) voltage input v c 59k r t 40.2k li-ion battery + 1k load 40903 tao1 v out (typ) v bat + 0.3v 5v v bat available input hv input usb only bat only 6.8h 0.47f ltc4090-3 high voltage battery charger efficiency v bat (v) 2.0 efficiency (%) 70 80 90 4.0 40903 ta01b 6050 20 4030 2.5 3.0 3.5 4.5 figure 12 schematic with r prog = 52k no output load hvin = 36v hvin = 24v hvin = 12v hvin = 8v typical application l , lt , lt c , lt m , linear technology, the linear logo and burst mode are registered trademarks and bat-track, powerpath and thinsot are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. downloaded from: http:///
ltc4090-3 2 40903fb for more information www.linear.com/ltc4090-3 pin configuration absolute maximum ratings hvin , hven ( note 9) ................................................ 60 v boost ...................................................................... 56 v boost above sw ..................................................... 30 v pg , sync .................................................................. 30 v in , out , hvout t < 1 ms and duty cycle < 1% ................... ?0.3 v to 7v steady state ............................................ ?0.3 v to 6v bat , hpwr , susp , v c , chrg , hvpr ........... ?0.3 v to 6v ntc, timer , prog , clprog .......... ?0.3 v to v cc + 0.3 v i in , i out , i bat ( note 5) .............................................. 2.5 a operating temperature range ..................... ?40 to 85 c junction temperature ............................................ 110 c storage temperature range ...................... ?65 to 125 c (notes 1, 2, 3, 4) 2221 20 19 18 17 16 15 14 13 12 12 3 4 5 6 7 8 9 1011 hvenhvin sw boost hvout timer susp hpwr clprog out in top view 23 djc package 22-lead (6mm 3mm) plastic dfn sync pg r t v c ntc vntc hvpr chrgprog gate bat t jmax = 110c, ja = 47c/w exposed pad (pin 23) is gnd, must be soldered to pcb lead free finish tape and reel part marking package description temperature range ltc4090edjc-3#pbf ltc4090edjc-3#trpbf 40903 22-lead (6mm 3mm) plastic dfn ?40c to 85c ltc4090 options part number float voltage ntc hot threshold b at -track adaptive hv output ltc4090 4.2v 29% v vntc yes ltc4090-3 3.95v 32.6% v vntc yes ltc4090-5 4.2v 29% v vntc no consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ order information downloaded from: http:///
ltc4090-3 3 40903fb for more information www.linear.com/ltc4090-3 the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. hvin = hven = 12v, boost = 17v, v in = hpwr = 5v, v b at = 3.7v, r prog = 100k, r clprog = 2k and susp = 0v, unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units usb input current limitv in usb input supply voltage l 4.35 5.5 v i in input bias current i bat = 0 (note 6) suspend mode; susp = 5v l l 0.5 50 1 100 ma a i lim current limit hpwr = 5v hpwr = 0v l l 475 90 500 100 525 110 ma ma i in(max) maximum input current limit (note 7) 2.4 a r on on-resistance v in to v out i out = 80ma 0.215 w v clprog clprog servo voltage in current limit r clprog = 2k r clprog = 1k l l 0.98 0.98 1.00 1.00 1.02 1.02 v v i ss soft-start inrush current 10 ma/s v clen input current limit enable threshold voltage (v in - v out ) (v in - v out ) rising (v in - v out ) falling 20 ?80 50 ?50 80 ?20 mv mv v uvlo input undervoltage lockout v in rising l 3.6 3.8 4 v d v uvlo input undervoltage lockout hysteresis v in rising ? v in falling 130 mv high voltage regulator v hvin hvin supply voltage l 6 60 v v ovlo hvin overvoltage lockout threshold l 36 38 40 v i hvin hvin bias current shutdown; hven = 0.2v not switching, hvout = 3.6v l 0.01 130 0.5 200 a a v out output voltage with hvin present assumes hvout to out connection, 0 v bat 4.2v 3.45 v bat + 0.3 4.4 v f sw switching frequency r t = 8.66k r t = 29.4k r t = 187k 2.1 0.9 160 2.4 1.0 200 2.7 1.15 240 mhz mhz khz t off minimum switch off-time l 60 150 ns i sw(max) switch current limit duty cycle = 5% 3.0 3.5 4.0 a v sat switch v cesat i sw = 2a 500 mv i r boost schottky reverse leakage sw = 10v, hvout = 0v 0.02 2 a v b(min) minimum boost voltage (note 8) l 1.5 2.1 v i bst boost pin current i sw = 1a 22 35 ma battery managementi bat battery drain current v bat = 4.05v, charging stopped suspend mode, susp = 5v v in = 0v, bat powers out, no load l l l 15 22 60 27 35 100 a a a v float v bat regulated output voltage i bat = 2ma i bat = 2ma; 0 t a 85c 3.915 3.910 3.95 3.95 3.985 3.990 v v i chg constant-current mode charge current, no load r prog = 100k r prog = 50k, 0 t a 85c l 465 900 500 1000 535 1080 ma ma i chg(max) maximum charge current 1.5 a v prog prog pin servo voltage r prog = 100k r prog = 50k l l 0.98 0.98 1.00 1.00 1.02 1.02 v v k eoc ratio of end-of-charge indication current to charge current v bat = v float (3.95v) l 0.085 0.1 0.11 ma/ma downloaded from: http:///
ltc4090-3 4 40903fb for more information www.linear.com/ltc4090-3 symbol parameter conditions min typ max units i trkl trickle charge current bat = 2v 35 50 60 ma v trkl trickle charge threshold voltage bat rising l 2.75 2.9 3.0 v v cen charge enable threshold voltage (v out ? v bat ) falling; v bat = 4v (v out ? v bat ) rising; v bat = 4v 55 80 mv mv d v rechrg recharge battery threshold voltage threshold voltage relative to v float l ?65 ?100 ?135 mv t timer timer accuracy v bat = 4.05v ?10 10 % recharge time percent of total charge time 50 % low battery trickle charge time percent of total charge time, v bat <2.9v 25 % t lim junction temperature in constant- temperature mode 105 c internal ideal dioder fwd incremental resistance, v on regulation i out = 100ma 125 m w r dio, on on-resistance v bat to v out i out = 600ma 215 m w v fwd voltage forward drop (v bat ? v out ) i out = 5ma i out = 100ma i out = 600ma l 10 30 55 160 50 mv mv mv v off diode disable battery voltage 2.7 v i fwd load current limit for v on regulation 550 ma i d(max) diode current limit 2.2 a external ideal diodev fwd , ext external diode forward voltage 20 mv logic ( chrg , hvpr , timer, susp, hpwr, hven, pg, sync) v chg, sd charger shutdown threshold voltage on timer l 0.14 0.4 v i chg, sd charger shutdown pull-up current on timer v timer = 0v l 5 14 a v ol output low voltage ( chrg , hvpr ); i sink = 5ma l 0.1 0.4 v v ih input high voltage susp, hpwr 1.2 v v il input low voltage susp, hpwr 0.4 v v hven, h hven high threshold 2.3 v v hven, l hven low threshold 0.3 v i pulldn logic input pull-down current susp, hpwr 2 a i hven hven pin bias current hven = 2.5v 5 10 a v pg pg threshold hvout rising 2.8 v d v pg pg hysteresis 35 mv i pglk pg leakage pg = 5v 0.1 1 a i pg pg sink current pg = 0.4v l 100 900 a v sync, l sync low threshold 0.5 v v sync, h sync high threshold 0.8 v i sync sync pin bias current v sync = 0v 0.1 a electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. hvin = hven = 12v, boost = 17v, v in = hpwr = 5v, v b at = 3.7v, r prog = 100k, r clprog = 2k and susp = 0v, unless otherwise noted. downloaded from: http:///
ltc4090-3 5 40903fb for more information www.linear.com/ltc4090-3 i bat (ma) 0 3.75 v float (v) 3.80 3.85 3.90 3.95 4.00 4.05 200 400 600 800 40903 g01 1000 r prog = 34k temperature (c) ?50 v float (v) 3.945 3.950 3.955 25 75 40903 g02 3.940 3.935 3.930 ?25 0 50 3.960 3.965 3.970 100 v in = 5v i bat = 2ma note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc4090-3 is guaranteed to meet performance specifications from 0c to 85c. specifications over the ?40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperatures will exceed 110c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. note 4: v cc is the greater of v in , v out , and v bat note 5: guaranteed by long term current density limitations. note 6: total input current is equal to this specification plus 1.002 i bat where i bat is the charge current. note 7: accuracy of programmed current may degrade for currents greater than 1.5a.note 8: this is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch.note 9: absolute maximum voltage at hvin and hven pins is for nonrepetitive 1 second transients; 40v for continuous operation. electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. hvin = hven = 12v, boost = 17v, v in = hpwr = 5v, v b at = 3.7v, r prog = 100k, r clprog = 2k and susp = 0v, unless otherwise noted. symbol parameter conditions min typ max units ntci vntc vntc pin current vntc = 2.5v l 1.4 2.5 3.5 ma v vntc vntc bias voltage i vntc = 500a l 4.4 4.85 v i ntc ntc input leakage current ntc = 1v 0 1 a v cold cold temperature fault threshold voltage rising ntc voltage hysteresis 0.738 vntc 0.02 vntc v v v hot hot temperature fault threshold voltage falling ntc voltage hysteresis 0.326 vntc 0.015 vntc v v v dis ntc disable threshold voltage falling ntc voltage hysteresis l 75 100 35 125 mv mv v float load regulation battery regulation (float) voltage vs temperature typical performance characteristics downloaded from: http:///
ltc4090-3 6 40903fb for more information www.linear.com/ltc4090-3 switch current (ma) 0 400 500 700 1500 40903 g12 300200 500 1000 2000 2500 100 0 600 voltage drop (mv) 0 3000 4000 5000 80 40903 g07 20001000 2500 3500 45001500 500 0 20 40 60 100 v fwd (mv) i out (ma) v bat = 3.7v v in = 0v si2333 pfet 100c 50c 0c ?50c v bat (v) 0 0 i bat (ma) 100 300 400 500 1 2 2.5 4.5 40903 g04 200 0.5 1.5 3 3.5 4 600 v in = 5v v out = no load r prog = 100k r clprog = 2k hpwr = 5v temperature (c) ?50 i bat (ma) 400 500 600 25 75 40903 g05 300 200 ?25 0 50 100 125 100 0 r prog = 2.1k v in = 5v v bat = 3.5v ja = 40c/w v fwd (mv) 0 0 i out (ma) 100 300 400 500 1000 700 50 100 40903 g06 200 800 900 600 150 200 v bat = 3.7v v in = 0v 100c 50c 0c ?50c i out (a) 0 efficiency (%) 80 90 100 0.8 40903 g08 7060 75 85 9565 55 50 0.2 0.4 0.6 1.0 figure 12 schematic v bat = 3.96v (i bat = 0) hvin = 36v hvin = 24v hvin = 12v hvin = 8v hvin (v) 5 1.8 i out (a) 2.0 2.2 2.4 2.6 3.0 10 15 20 25 40903 g10 30 35 2.8 figure 12 schematic v bat = 3.96v (i bat = 0) typical minimum tempera ture (?c) minimum switch on time (ns) 80 100 120 40903 g11 6040 20 0 140 ?50 25 ?25 0 50 75 100 150 125 typical performance characteristics charging from usb, i b at vs v b at charge current vs temperature (thermal regulation) ideal diode current vs forward voltage and temperature (no external device) ideal diode current vs forward voltage and temperature with external device ltc4090 high voltage regulator efficiency vs output load high voltage regulator maximum load current high voltage regulator minimum switch on-time vs temperature high voltage regulator switch voltage drop i out (a) 0 efficiency (%) 80 90 100 0.8 40903 g09 7060 75 85 9565 55 50 0.2 0.4 0.6 1.0 figure 12 schematicv bat = 3.96v (i bat = 0) hvin = 36v hvin = 24v hvin = 12v hvin = 8v ltc4090-3high voltage regulator efficiency vs output load downloaded from: http:///
ltc4090-3 7 40903fb for more information www.linear.com/ltc4090-3 temperature (c) ?50 hvout threshold voltage (v) 2.80 2.85 2.90 25 75 150 40903 g21 2.75 2.70 2.65 ?25 0 50 100 125 duty cycle (%) 0 switch current limit(a) 40 40903 g16 2.5 20 60 1.51.0 4.03.5 3.0 2.0 80 100 hven pin voltage (v) 0 switch current limit (a) 3.5 1.5 40903 g15 2.0 1.0 0.5 1 2 0.5 0 4.03.0 2.5 1.5 2.5 3 3.5 temperature (c) ?50 500 frequency (khz) 600 700 800 900 0 50 100 150 40903 g13 1000 1100 ?25 25 75 125 hvout (v) 0 0 switching frequency (khz) 100 300 400 500 1000 700 1 2 40903 g14 200 800 900 600 3 4 boost diode current (a) 0 boost diode v f (v) 0.8 1.0 1.2 2.0 40903 g19 0.60.4 0 0.5 1.0 1.5 0.2 1.4 load current (ma) 1 5.0 hvin (v) 6.0 7.0 10 100 1000 40903 g18 4.0 4.5 5.5 6.5 3.53.0 to start to run temperature (c) v c voltage (v) 1.50 2.00 2.50 40903 g20 1.000.50 0 current limit clamp switching threshold ?50 25 ?25 0 50 75 100 150 125 typical performance characteristics high voltage regulator switch frequency high voltage regulator frequency foldback high voltage regulator soft-start high voltage regulator switch current limit high voltage regulator minimum input voltage high voltage regulator boost diode v f vs i f high voltage regulator v c voltages high voltage regulator power good threshold temperature (c) switch current limit (a) 2.0 2.5 3.5 3.0 40903 g17 1.5 1.0 0 0.5 4.5 4.0 duty cycle = 10 % duty cycle = 90 % ?50 25 ?25 0 50 75 100 150 125 high voltage regulator switch current limit downloaded from: http:///
ltc4090-3 8 40903fb for more information www.linear.com/ltc4090-3 100s/div hpwr 5v/div i in 0.5a/div i bat 0.5a/div 40903 g27 v bat = 3.85v i out = 50ma typical performance characteristics ltc4090 input connect waveforms ltc4090 input disconnect waveforms ltc4090 response to suspend ltc4090 high voltage input connect waveforms ltc4090 high voltage input disconnect waveforms ltc4090 high voltage regulator load transient ltc4090 high voltage regulator load transient 1ms/div v in 5v/div v out 5v/div i in 0.5a/div i bat 0.5a/div 40903 g22 v bat = 3.85v i out = 100ma 1ms/div v in 5v/div v out 5v/div i in 0.5a/div i bat 0.5a/div 40903 g23 v bat = 3.85v i out = 100ma 1ms/div susp 5v/div v out 5v/div i in 0.5a/div i bat 0.5a/div 40903 g24 v bat = 3.85v i out = 50ma 2ms/div v hvin 10v/div v out 5v/div i hvin 1a/div i bat 1a/div 40903 g25 v bat = 3.85v i out = 100ma 2ms/div v hvin 5v/div v out 5v/div i hvin 1a/div i bat 1a/div 40903 g26 v bat = 3.85v i out = 100ma ltc4090 response to hpwr 25s/div hvout 50mv/div i out 1a/div 40903 g28 i load = 500ma 25s/div hvout 50mv/div i l 1a/div 40903 g29 i load = 500ma downloaded from: http:///
ltc4090-3 9 40903fb for more information www.linear.com/ltc4090-3 pin functions sync ( pin 1): external clock synchronization input. see synchronizing section in the applications information section. ground pin when not used.pg ( pin 2): open collector output of an internal compara- tor. pg remains low until the hvout pin is above 2.8 v. pg output is valid when hvin is above 3.6 v and hven is high. r t ( pin 3): oscillator resistor input. connecting a resistor to ground from this pin sets the switching frequency. v c ( pin 4): high voltage buck regulator control pin. the voltage on this pin controls the peak switch current in the high voltage regulator. tie an rc network from this pin to ground to compensate the control loop.ntc ( pin 5): input to the ntc thermistor monitoring circuit. the ntc pin connects to a negative temperature coefficient thermistor which is typically co- packaged with the battery pack to determine if the battery is too hot or too cold to charge. if the battery temperature is out of range, charging is paused until the battery temperature re-enters the valid range. a low drift bias resistor is re- quired from in to ntc and a thermistor is required from ntc to ground. to disable the ntc function, the ntc pin should be grounded.vntc ( pin 6): output bias voltage for ntc. a resistor from this pin to the ntc pin will bias the ntc thermistor. hvpr ( pin 7): high voltage present output ( active low). a low on this pin indicates that the high voltage regulator has sufficient voltage to charge the battery. this feature is enabled if power is present on hvin, in, or bat ( i.e., above uvlo thresholds). chrg ( pin 8): open - drain charge status output. when the battery is being charged, the chrg pin is pulled low by an internal n-channel mosfet. when the timer runs out or the charge current drops below 10% of the programmed charge current or the input supply is removed, the chrg pin is forced to a high impedance state. prog ( pin 9): charge current program pin. connecting a resistor from prog to ground programs the charge current : i chg (a) = 50,000v r prog gate ( pin 10): external ideal diode gate connection. this pin controls the gate of an optional external p-channel mosfet transistor used to supplement the internal ideal diode. the source of the p-channel mosfet should be connected to out and the drain should be connected to bat . when not in use, this pin should be left floating. it is important to maintain high impedance on this pin and minimize all leakage paths. b at ( pin 11): single-cell li-ion battery. this pin is used as an output when charging the battery and as an input when supplying power to out. when the out pin potential drops below the bat pin potential, an ideal diode function connects bat to out and prevents out from dropping more than 100 mv below bat . a precision internal resistor divider sets the final float ( charging) potential on this pin. the internal resistor divider is disconnected when in and hvin are in undervoltage lockout. in ( pin 12): input supply. connect to usb supply, v bus . input current to this pin is limited to either 20% or 100% of the current programmed by the clprog pin as de- termined by the state of the hpwr pin. charge current (to the bat pin ) supplied through the input is set to the current programmed by the prog pin but will be limited by the input current limit if charge current is set greater than the input current limit or if the sum of charge current plus load current is greater than the input current limit.out ( pin 13): voltage output. this pin is used to provide controlled power to a usb device from either usb v bus (in), an external high voltage supply ( hvin), or the battery ( bat ) when no other supply is present. the high voltage supply is prioritized over the usb v bus input. out should be bypassed with at least 4.7f to gnd. downloaded from: http:///
ltc4090-3 10 40903fb for more information www.linear.com/ltc4090-3 clprog ( pin 14): current limit program and input cur- rent monitor. connecting a resistor, r clprog , to ground programs the input to output current limit. the current limit is programmed as follows: i cl (a) = 1000v r clprog in usb applications, the resistor r clprog should be set to no less than 2.1 k. the voltage on the clprog pin is always proportional to the current flowing through the in to out power path. this current can be calculated as follows: i in (a) = v clprog r clprog 1000 hpwr ( pin 15): high power select. this logic input is used to control the input current limit. a voltage greater than 1.2v on the pin will set the input current limit to 100% of the current programmed by the clprog pin. a voltage less than 0.4 v on the pin will set the input current limit to 20% of the current programmed by the clprog pin. a 2a pull- down current is internally connected to this pin to ensure it is low at power up when the pin is not being driven externally. susp ( pin 16): suspend mode input. pulling this pin above 1.2 v will disable the power path from in to out. the supply current from in will be reduced to comply with the usb specification for suspend mode. both the ability to charge the battery from hvin and the ideal diode function ( from bat to out) will remain active. suspend mode will reset the charge timer if out is less than bat while in suspend mode. if out is kept greater than bat , such as when the high voltage input is present, the charge timer will not be reset when the part is put in suspend. a 2a pull-down current is internally connected to this pin to ensure it is low at power up when the pin is not being driven externally. timer ( pin 17): timer capacitor. placing a capacitor, c timer , to gnd sets the timer period. the timer period is: t timer (hours) = c timer r prog 3hours 0.1f 100k charge time is increased if charge current is reduced due to load current, thermal regulation and current limit selection (hpwr low). shorting the timer pin to gnd disables the battery charging functions.hvout ( pin 18): voltage output of the high voltage regulator. when sufficient voltage is present at hvout, the low voltage power path from in to out will be dis- connected and the hvpr pin will be pulled low to indicate that a high voltage wall adapter has been detected. the ltc4090 high voltage regulator will maintain just enough differential voltage between hvout and bat to keep the battery charger mosfet out of dropout ( typically 300 mv from out to bat ). hvout should be bypassed with at least 22f to gnd.boost ( pin 19): this pin is used to provide drive voltage, higher than the input voltage, to the internal bipolar npn power switch.sw ( pin 20): the sw pin is the output of the internal high voltage power switch. connect this pin to the inductor, catch diode and boost capacitor.hvin ( pin 21): high voltage regulator input. the hvin pin supplies current to the internal high voltage regulation and to the internal high voltage power switch. the presence of a high voltage input takes priority over the usb v bus input ( i.e., when a high voltage input supply is detected, the usb in to out path is disconnected). this pin must be locally bypassed.hven ( pin 22): high voltage regulator enable input. the hven pin is used to disable the high voltage input path. tie to ground to disable the high voltage input or tie to at least 2.3 v to enable the high voltage path. if this feature is not used, tie hven to the hvin pin. this pin can also be used to soft-start the high voltage regulator; see the applications information section for more information. exposed pad ( pin 23): ground. the exposed package pad is ground and must be soldered to the pc board for proper functionality and for maximum heat transfer ( use several vias directly under the ltc4090-3). pin functions downloaded from: http:///
ltc4090-3 11 40903fb for more information www.linear.com/ltc4090-3 block diagram ? + soft-start 0.25v soft-start2 ? + ? + ? + ? + 15 too cold current limit toohot 0.1v ntc enable v ntc 14 ntc t 10k r prog 10k ? + 13 hpwr 22 clprog in 23 prog chg 1v 500ma/100ma 2 a ? + ? + currentcontrol vc clamp charge control control logic voltage detect counter oscillator ta die temp 105c i lim 2.8v ? + 2.9v battery uvlo 3.85vrecharge uvlo in out bat i chg bat uv rechrg hold reset ntcerr clk eoc c/10 ? + ? + 11 2a 16 gnd susp r clprog v set 3.6v in hvout out out gate bat bat 21 timer c timer 18 chrg stop hvpr 40903 bd 1v cl i lim cntl enable ? + eda 19 d1 c2 l1 i in 1000 10 c c r c c f pg hvinv c 10 cc/cv regulator charger enable ? + ? + 4.25v (rising) 3.15v (falling) ? + 21 21 21 rs q r t1 10 c1 10 sync 10 r t 10 hven 10 ? ++ 75mv (rising) 25mv (falling) 350mv gm boost q1 sw 20mv 30mv idealdiode q driver + ? + ? + ? + ? oscillator 200khz - 2.4mhz soft-start internal reference i l downloaded from: http:///
ltc4090-3 12 40903fb for more information www.linear.com/ltc4090-3 operation introduction the ltc4090-3 is a complete powerpath controller for battery powered usb applications. the ltc4090-3 is designed to receive power from a low voltage source (e.g., usb or 5 v wall adapter), a high voltage source ( e.g., firewire/ieee1394, automotive battery , 12 v wall adapter, etc.), and a single-cell li-ion battery. it can then deliver power to an application connected to the out pin and a battery connected to the bat pin ( assuming that an external supply other than the battery is present). power supplies that have limited current resources ( such as usb v bus supplies) should be connected to the in pin which has a programmable current limit. battery charge current will be adjusted to ensure that the sum of the charge current and load current does not exceed the programmed input current limit (see figure 1). an ideal diode function provides power from the battery when output / load current exceeds the input current limit or when input power is removed. powering the load through the ideal diode instead of connecting the load directly to the battery allows a fully charged battery to remain fully charged until external power is removed. once external power is removed the output drops until the ideal diode is forward biased. the forward biased ideal diode will then provide the output power to the load from the battery. the ltc4090-3 also includes a high voltage switching regulator which has the ability to receive power from a high voltage input. this input takes priority over the usb v bus input ( i.e., if both hvin and in are present, load current and charge current will be delivered via the high voltage path). when enabled, the high voltage regulator regulates the hvout voltage using a constant frequency, hvoutout gate bat bat out hvpr 40903 f01 ? + eda 19 d1 l1 cc/cv regulator charger high voltage buck regulator usb current limit enable ? + ? + 21 21 21 c1 hvin in q1 sw 30mv 30mvideal diode 4.25v (rising) 3.15v (falling) 75mv (rising) 25mv (falling) + load li-ion + ? + ? + ? figure 1. simplified powerpath block diagram downloaded from: http:///
ltc4090-3 13 40903fb for more information www.linear.com/ltc4090-3 operation current mode regulator. an external pfet between hvout (drain) and out ( source) is turned on via the hvpr pin allowing out to charge the battery and/or supply power to the application. the ltc4090?s bat-track maintains ap- proximately 300 mv between the out pin and the bat pin. usb input current limit the input current limit and charge control circuits of the ltc4090-3 are designed to limit input current as well as control battery charge current as a function of i out . out drives the external load and the battery charger. if the combined load at out does not exceed the pro- grammed input current limit, out will be connected to in through an internal 215m w p-channel mosfet. if the combined load at out exceeds the programmed input current limit, the battery charger will reduce its charge current by the amount necessary to enable the external load to be satisfied while maintaining the programmed input current. even if the battery charge current is set to exceed the allowable usb current, a correctly programmed input current limit will ensure that the usb specification is never violated. furthermore, load current at out will always be prioritized and only excess available current will be used to charge the battery. the input current limit, i cl , can be programmed using the following formula: i cl = 1000 r clprog v clprog ?? ? ?? ? = 1000v r clprog where v clprog is the clprog pin voltage ( typically 1 v) and r clprog is the total resistance from the clprog pin to ground. for best stability over temperature and time, 1% metal film resistors are recommended. the programmed battery charge current, i chg , is de- fined as: i chg = 50,000 r prog v prog ?? ? ?? ? = 50,000v r prog input current, i in , is equal to the sum of the bat pin output current and the out pin output current. v clprog will track the input current according to the following equation: i in = i out + i bat = v clprog r clprog 1000 in usb applications, the maximum value for r clprog should be 2.1 k. this will prevent the input current from exceeding 500 ma due to ltc4090-3 tolerances and qui- escent currents. a 2.1 k clprog resistor will give a typical current limit of 476 ma in high power mode ( when hpwr is high) or 95 ma in low power mode ( when hpwr is low). when susp is driven to a logic high, the input power path is disabled and the ideal diode from bat to out will supply power to the application. high voltage step down regulator the power delivered from hvin to hvout is controlled by a constant-frequency, current mode step down regulator. an external p-channel mosfet directs this power to out and prevents reverse conduction from out to hvout ( and ultimately hvin). an oscillator, with frequency set by r t , enables an rs flip-flop, turning on the internal power switch. an amplifier and comparator monitor the current flowing between hvin and sw pins, turning the switch off when this current reaches a level determined by the voltage at v c . an error amplifier servos the v c node to maintain approximately 300mv between out and bat . by keeping the voltage across the battery charger low, efficiency is optimized because power lost to the battery charger is minimized and power available to the external load is maximized. if the bat pin voltage is less than approximately 3.3 v, then the error amplifier will servo the v c node to provide a constant hvout output voltage of about 3.6 v. an active clamp on the v c node provides current limit. the v c node is also clamped to the voltage on the hven pin; soft-start is implemented by generating a voltage ramp at the hven pin using an external resistor and capacitor. downloaded from: http:///
ltc4090-3 14 40903fb for more information www.linear.com/ltc4090-3 the switch driver operates from either the high voltage input or from the boost pin. an external capacitor and internal diode are used to generate a voltage at the boost pin that is higher than the input supply. this allows the driver to fully saturate the internal bipolar npn power switch for efficient operation. to further optimize efficiency, the high voltage buck regu- lator automatically switches to burst mode ? operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current. the oscillator reduces the switch regulator?s operating frequency when the voltage at the hvout pin is low ( be- low 2.95 v). this frequency foldback helps to control the output current during start-up and overload.the high voltage regulator contains a power good com-parator which trips when the hvout pin is at 2.8 v. the pg output is an open-collector transistor that is off when the output is in regulation, allowing an external re- sistor to pull the pg pin high. power good is valid when the switching regulator is enabled and hvin is above 3.6 v. ideal diode from b at to out the ltc4090-3 has an internal ideal diode as well as a controller for an optional external ideal diode. if a battery is the only power supply available, or if the load current exceeds the programmed input current limit, then the battery will automatically deliver power to the load via an ideal diode circuit between the bat and out pins. the ideal diode circuit ( along with the recommended 4.7f capacitor on the out pin) allows the ltc4090-3 to handle large transient loads and wall adapter or usb v bus connect/disconnect scenarios without the need for large bulk capacitors. the ideal diode responds within a few microseconds and prevents the out pin voltage from dropping significantly below the bat pin voltage. a comparison of the i-v curve of the ideal diode and a schottky diode can be seen in figure 3. if the desired input current increases beyond the pro- grammed input current limit additional current will be drawn from the battery via the internal ideal diode. furthermore, if power to in ( usb v bus ) or hvin ( high voltage input) is removed, then all of the application power will be pro- figure 2. input and battery currents as a function of load current i in i load(ma) 0 300 400 500 400 500 300 40903 f02a 200100 100 200 0 current (ma) i load i bat (charging) i bat (ideal diode) i in i load(ma) 0 60 80 100 80 100 60 40903 f02b 4020 20 40 0 current (ma) i load i bat (charging) i bat (ideal diode) i load (ma) 0 300 400 500 400 500 300 40903 f02c 200100 100 200 0 current (ma) i in i load i bat = i chg i bat = i cl = i out i bat (charging) i bat (ideal diode) (a) high power mode/full charge r prog = 100k and r clprog = 2k (b) low power mode/full charge r prog = 100k and r clprog = 2k (c) high power mode with i cl = 500ma and i chg = 250ma r prog = 100k and r clprog = 2k downloaded from: http:///
ltc4090-3 15 40903fb for more information www.linear.com/ltc4090-3 operation vided by the battery via the ideal diode. a 4.7 f capacitor at out is sufficient to keep a transition from input power to battery power from causing significant output voltage droop. the ideal diode consists of a precision amplifier that enables a large p- channel mosfet transistor whenever the voltage at out is approximately 20 mv ( v fwd ) below the voltage at bat . the resistance of the internal ideal diode is approximately 215m w . if this is sufficient for the application then no external components are necessary. however if more conductance is needed, an external p-channel mosfet can be added from bat to out. the gate pin of the ltc4090-3 drives the gate of the external pfet for automatic ideal diode control. the source of the external mosfet should be connected to out and the drain should be connected to bat . in order to help protect the external mosfet in overcurrent situations, it should be placed in close thermal contact to the ltc4090-3.suspend mode when susp is pulled above v ih the ltc4090-3 enters suspend mode to comply with the usb specification. in this mode, the power path between in and out is put in a high impedance state to reduce the in input current to 50a. if no other power source is available to drive hvin, the system load connected to out is supplied through the ideal diodes connected to bat . battery chargerthe battery charger circuits of the ltc4090-3 are designed for charging single-cell lithium-ion batteries. featuring an internal p-channel power mosfet, the charger uses a constant - current / constant - voltage charge algorithm with programmable charge current and a programmable timer for charge termination. charge current can be programmed up to 1.5a. the final float voltage accuracy is 0.8% typical. no blocking diode or sense resistor is required when powering either the in or the hvin pins. the chrg open-drain status output provides information regarding the charging status of the ltc4090-3 at all times . an ntc input provides the option of charge qualification using battery temperature. the charge cycle begins when the voltage at the out pin rises above the battery voltage and the battery voltage is below the recharge threshold. no charge current actually flows until the out voltage is 100 mv above the bat voltage . at the beginning of the charge cycle, if the battery voltage is below 2.9 v, the charger goes into trickle charge mode to bring the cell voltage up to a safe level for charging. the charger goes into the fast charge constant-current mode once the voltage on the bat pin rises above 2.9 v. in constant-current mode, the charge current is set by r prog . when the battery approaches the final float voltage , the charge current begins to decrease as the ltc4090-3 switches to constant-voltage mode. when the charge current drops below 10% of the programmed value while in constant-voltage mode the chrg pin assumes a high impedance state. figure 3. ltc4090-3 vs schottky diode forward voltage drop constant i 0n constant r 0n constant v 0n v fwd i max forward voltage (v) 40903 f03 i fwd 0 current (a) slope: 1/r dio(on) slope: 1/r fwd schottky diode downloaded from: http:///
ltc4090-3 16 40903fb for more information www.linear.com/ltc4090-3 operation an external capacitor on the timer pin sets the total minimum charge time. when this time elapses, the charge cycle terminates and the chrg pin assumes a high impedance state, if it has not already done so. while charging in constant-current mode, if the charge current is decreased by thermal regulation or in order to maintain the programmed input current limit, the charge time is automatically increased. in other words, the charge time is extended inversely proportional to the actual charge current delivered to the battery. for li-ion and similar batteries that require accurate final float potential, the internal bandgap reference, voltage amplifier and the resistor divider provide regulation with 0.8% accuracy. trickle charge and defective battery detection at the beginning of a charge cycle, if the battery voltage is below 2.9 v, the charger goes into trickle charge reduc- ing the charge current to 10% of the full-scale current. if the low battery voltage persists for one quarter of the programmed total charge time, the battery is assumed to be defective, the charge cycle is terminated and the chrg pin output assumes a high impedance state. if for any reason the battery voltage rises above ~2.9 v the charge cycle will be restarted. to restart the charge cycle (i.e., when the dead battery is replaced with a discharged battery), simply remove the input voltage and reapply it or cycle the timer pin to 0v.programming charge current the formula for the battery charge current is: i chg = i prog 50,000 = v prog r prog 50,000 where v prog is the prog pin voltage and r prog is the total resistance from the prog pin to ground. keep in mind that when the ltc4090-3 is powered from the in pin, the programmed input current limit takes precedence over the charge current. in such a scenario, the charge current cannot exceed the programmed input current limit . for example, if typical 500 ma charge current is required , calculate: r prog = 1v 500ma 50,000 = 100k for best stability over temperature and time , 1% metal film resistors are recommended. under trickle charge condi- tions, this current is reduced to 10% of the full-scale value. the charge timer the programmable charge timer is used to terminate the charge cycle. the timer duration is programmed by an external capacitor at the timer pin. the charge time is typically: t timer (hours) = c timer r prog 3hours 0.1f 100k the timer starts when an input voltage greater than the undervoltage lockout threshold level is applied or when leaving shutdown and the voltage on the battery is less than the recharge threshold. at power-up or exiting shutdown with the battery voltage less than the recharge threshold, the charge time is a full cycle. if the battery is greater than the recharge threshold the timer will not start and charging is prevented. if after power-up the battery voltage drops below the recharge threshold, or if after a charge cycle the battery voltage is still below the recharge threshold, the charge time is set to one-half of a full cycle. the ltc4090-3 has a feature that extends charge time automatically. charge time is extended if the charge current in constant-current mode is reduced due to load current or thermal regulation. this change in charge time is inversely proportional to the change in charge current. as the ltc4090-3 approaches constant-voltage mode the charge current begins to drop. this change in charge current is due to normal charging operation and does not affect the timer duration. downloaded from: http:///
ltc4090-3 17 40903fb for more information www.linear.com/ltc4090-3 operation consider, for example, a usb charge condition where r clprog = 2 k, r prog = 100 k and c timer = 0.1 f. this corresponds to a three hour charge cycle. however, if the hpwr input is set to a logic low, then the input current limit will be reduced from 500 ma to 100 ma. with no ad-ditional system load, this means the charge current will be reduced to 100 ma. therefore, the termination timer will automatically slow down by a factor of five until the charger reaches constant-voltage mode ( i.e., v bat ap- proaches 4.2 v) or hpwr is returned to a logic high. the charge cycle is automatically lengthened to account for the reduced charge current. the exact time of the charge cycle will depend on how long the charger remains in constant-current mode and/or how long the hpwr pin remains logic low. once a timeout occurs and the voltage on the battery is greater than the recharge threshold, the charge current stops, and the chrg output assumes a high impedance state if it has not already done so. connecting the timer pin to ground disables the battery charger.chrg status output pin when the charge cycle starts, the chrg pin is pulled to ground by an internal n-channel mosfet capable of driv-ing an led. when the charge current drops below 10% of the programmed full charge current while in constant-voltage mode, the pin assumes a high imped- ance state, but charge current continues to flow until the charge time elapses. if this state is not reached before the end of the programmable charge time, the pin will assume a high impedance state when a timeout occurs. the chrg current detection threshold can be calculated by the fol-lowing equation: i detect = 0.1v r prog 50,000 = 5000v r prog for example, if the full charge current is programmed to 500 ma with a 100 k prog resistor the chrg pin will change state at a battery charge current of 50ma. note: the end-of-charge ( eoc) comparator that moni-tors the charge current latches its decision. therefore, the first time the charge current drops below 10% of the programmed full charge current while in constant-volt- age mode, it will toggle chrg to a high impedance state. if, for some reason the charge current rises back above the threshold, the chrg pin will not resume the strong pull-down state. the eoc latch can be reset by a recharge cycle ( i.e., v bat drops below the recharge threshold) or toggling the input power to the part.automatic recharge after the battery charger terminates, it will remain off drawing only microamperes of current from the battery. if the product remains in this state long enough, the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below v rechrg ( typically 4.1v). to prevent brief excursions below v rechrg from resetting the safety timer, the battery voltage must be below v rechrg for more than a few milliseconds. the charge cycle and safety timer will also restart if the in uvlo cycles low and then high ( e.g., in is removed and then replaced).thermal regulation to prevent thermal damage to the ic or surrounding compo - nents, an internal thermal feedback loop will automatically decrease the programmed charge current if the die tem- perature rises to approximately 105 c. thermal regulation protects the ltc4090-3 from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the ltc4090-3 or external components. the benefit of the ltc4090-3 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case conditions. downloaded from: http:///
ltc4090-3 18 40903fb for more information www.linear.com/ltc4090-3 undervoltage lockout an internal undervoltage lockout circuit monitors the input voltage ( in) and the output voltage ( out) and disables either the input current limit or the battery charger circuits or both. the input current limit circuitry is disabled until v in rises above the undervoltage lockout threshold and v in exceeds v out by 50 mv. the battery charger circuits are disabled until v out exceeds v bat by 50 mv. both un- dervoltage lockout comparators have built-in hysteresis. ntc thermistor the battery temperature is measured by placing a neg- ative temperature coefficient ( ntc) thermistor close to the battery pack. to use this feature connect the ntc thermistor, r ntc , between the ntc pin and ground and a bias resistor, r nom , from vntc to ntc. r nom should be a 1% resistor with a value equal to the value of the chosen ntc thermistor at 25c (denoted r 25c ). the ltc4090-3 will pause charging when the resistance of the ntc thermistor drops to 0.48 times the value of r 25c or approximately 4.8 k ( for a vishay curve 2 thermistor, this corresponds to approximately 45 c). the safety timer also pauses until the thermistor indicates a return to a valid temperature. as the temperature drops, the resis- tance of the ntc thermistor rises. the ltc4090-3 is also designed to pause charging ( and timer) when the value of the ntc thermistor increases to 2.82 times the value of r 25c . for a vishay curve 2 thermistor this resistance, 28.2 k , corresponds to approximately 0 c . the hot and cold comparators each have approximately 2 c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin disables all ntc functionality. operation downloaded from: http:///
ltc4090-3 19 40903fb for more information www.linear.com/ltc4090-3 usb and 5v wall adapter power although the ltc4090-3 is designed to draw power from a usb port, a higher power 5 v wall adapter can also be used to power the application and charge the battery (higher voltage wall adapters can be connected directly to hvin). figure 4 shows an example of combining a 5 v wall adapter and a usb power input. with its gate grounded by 1 k , p-channel mosfet mp1 provides usb power to the ltc4090-3 when 5 v wall power is not available. when 5v wall power is available, diode d1 supplies power to the ltc4090-3, pulls the gate of mn1 high to increase the charge current ( by increasing the input current limit), and pulls the gate of mp1 high to disable it and prevent conduction back to the usb port. setting the switching frequency the high voltage switching regulator uses a constant-fre- quency pwm architecture that can be programmed to switch from 200 khz to 2.4 mhz by using a resistor tied from the r t pin to ground. a table showing the necessary r t value for a desired switching frequency is in table 1. table 1. switching frequency vs r t value switching frequency (mhz) r t value (k w ) 0.2 187 0.3 121 0.4 88.7 0.5 68.1 0.6 56.2 0.7 46.4 0.8 40.2 0.9 34.0 1.0 29.4 1.2 23.7 1.4 19.1 1.6 16.2 1.8 13.3 2.0 11.5 2.2 9.76 2.4 8.66 applications information figure 4. usb or 5v wall adapter power operating frequency trade-offs selection of the operating frequency for the high voltage buck regulator is a trade-off between efficiency, compo- nent size, minimum dropout voltage, and maximum input voltage . the advantage of high frequency operation is that smaller inductor and capacitor values may be used. the disadvantages are lower efficiency, lower maximum input voltage, and higher dropout voltage. the highest acceptable switching frequency ( f sw(max) ) for a given application can be calculated as follows: f sw(max) = v d + v hvout t on(min) v d + v hvin ? v sw ( ) where v hvin is the typical high voltage input voltage, v hvout is the output voltage of the switching regulator, v d is the catch diode drop (~0.5 v), and v sw is the internal switch drop (~0.5 v at max load). this equation shows that slower switching frequency is necessary to safely accommodate high v hvin /v hvout ratio. also, as shown in the next section, lower frequency allows a lower dropout voltage. the reason input voltage range depends on the switching frequency is because the high voltage switch has finite minimum on and off times. the switch can turn on for a minimum of ~150 ns and turn off for a minimum of ~150 ns. this means that the minimum and maximum duty cycles are: dc min = f sw t on(min) dc max = 1 ? f sw t off(min) where f sw is the switching frequency, t on(min) is the minimum switch-on time (~150 ns), and t off(min) is the 2k 1k mn1 2.87k 59k in prog clprog ltc4090-3 bat + mp1 d1 i chg li-ion battery 5v wall adapter 850ma i chg usb power 500ma i chg 40903 f04 downloaded from: http:///
ltc4090-3 20 40903fb for more information www.linear.com/ltc4090-3 applications information minimum switch - off time (~150 ns). these equations show that duty cycle range increases when switching frequency is decreased. a good choice of switching frequency should allow ade- quate input voltage range ( see next section) and keep the inductor and capacitor values small. hvin input voltage range the maximum input voltage range for the ltc4090-3 applications depends on the switching frequency, the absolute maximum ratings of the v hvin and boost pins, and the operating mode. the high voltage switching regulator can operate from input voltages up to 36 v, and safely withstand input voltages up to 60 v. note that while v hvin > 38 v ( typical), the ltc4090-3 will stop switching, allowing the output to fall out of regulation. while the high voltage regulator output is in start-up, short-circuit, or other overload conditions, the switching frequency should be chosen according to the following discussion. for safe operation at inputs up to 60 v the switching fre- quency must be low enough to satisfy v hvin(max) 40 v according to the following equation. if lower v hvin(max) is desired, this equation can be used directly. v hvin(max) = v hvout + v d f sw t on(min) ? v d + v sw where v hvin ( max ) is the maximum operating input voltage , v hvout is the high voltage regulator output voltage, v d is the catch diode drop (~0.5 v), v sw is the internal switch drop (~0.5 v at max load), f sw is the switching frequency (set by r t ), and t on(min) is the minimum switch-on time (~150ns). note that a higher switching frequency will de- press the maximum operating input voltage. conversely, a lower switching frequency will be necessary to achieve safe operation at high input voltages. if the output is in regulation and no short-circuit, start- up, or overload events are expected, then input voltage transients of up to 60 v are acceptable regardless of the switching frequency. in this mode, the ltc4090-3 may enter pulse-skipping operation where some switching pulses are skipped to maintain output regulation. in this mode the output voltage ripple and inductor current rip- ple will be higher than in normal operation. above 38 v, switching will stop. the minimum input voltage is determined by either the high voltage regulator ?s minimum operating voltage of ~6 v or by its maximum duty cycle ( see equation in previous section). the minimum input voltage due to duty cycle is: v hvin(min) = v hvout + v d 1 ? f sw t off(min) ? v d + v sw where v hvin(min) is the minimum input voltage, and t off(min) is the minimum switch-off time (150 ns). note that higher switching frequency will increase the minimum input voltage. if a lower dropout voltage is desired, a lower switching frequency should be used.inductor selection and maximum output current a good choice for the inductor value is l = 6.8 h ( assum- ing a 800 khz operating frequency). with this value the maximum load current will be ~2.4 a. the rms current rating of the inductor must be greater than the maximum load current and its saturation current should be about 30% higher. note that the maximum load current will be programmed charge current plus the largest expected application load current. for robust operation in fault conditions, the saturation current should be ~3.5 a. to keep efficiency high, the series resistance ( dcr) should be less than 0.1 w . table 2 lists several vendors and types that are suitable. table 2. inductor vendors vendor url part series type murata www.murata.com lqh55d open tdk www.componenttdk.com slf7045 slf10145 shielded shielded toko www.toko.com d62cb d63cb d75c d75f shielded shielded shielded open sumida www.sumida.com cr54 cdrh74 cdrh6d38 cr75 open shielded shielded open downloaded from: http:///
ltc4090-3 21 40903fb for more information www.linear.com/ltc4090-3 applications information catch diode the catch diode conducts current only during switch-off time. average forward current in normal operation can be calculated from: i d(avg) = i hvout v hvin ? v hvout ( ) v hvin where i hvout is the output load current. the only reason to consider a diode with a larger current rating than necessary for nominal operation is for the worst-case condition of shorted output. the diode current will then increase to the typical peak switch current. peak reverse voltage is equal to the regulator input voltage. use a schottky diode with a reverse voltage rating greater than the input voltage. the overvoltage protection feature in the high voltage regulator will keep the switch off when v hvin > 40 v which allows the use of 40 v rated schottky even when v hvin ranges up to 60 v. table 3 lists several schottky diodes and their manufacturers. table 3. diode vendors part number v r (v) i ave (a) v f at 1a (mv) v f at 2a (mv) on semiconductor mbrm120e mbrm140 20 40 1 1 530 550 595 diodes inc. b120 b130 b220 b230 dfls240l 20 30 20 30 40 1 1 2 2 2 500 500 500 500 500 international rectifier 10bq030 20bq030 30 30 1 2 420 470 470 high voltage regulator output capacitor selection the high voltage regulator output capacitor has two essential functions. along with the inductor, it filters the square wave generated at the switch pin to produce the dc output. in this role it determines the output ripple, and low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the ltc4090-3?s control loop. ceramic capacitors have very low equivalent series resistance ( esr) and provide the best ripple performance. a good starting value is: c out = 100 v out f sw where f sw is in mhz, and c out is the recommended output capacitance in f. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a higher value capacitor if the compensation network is also adjusted to maintain the loop bandwidth. a lower value of output capacitor can be used to save space and cost but transient performance will suffer. see the high voltage regulator frequency compensation section to choose an appropriate compensation network. when choosing a capacitor, look carefully through the data sheet to find out what the actual capacitance is under operating conditions ( applied voltage and temperature). a physically larger capacitor, or one with a higher voltage rating, may be required. high performance tantalum or electrolytic capacitors can be used for the output capacitor . low esr is important, so choose one that is intended for use in switching regulators. the esr should be specified by the supplier, and should be 0.05 w or less. such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low esr.ceramic capacitors ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can cause problems when used with the high voltage switching regulator due to their piezoelectric nature. when in burst mode operation, the ltc4090-3?s switching frequency depends on the load current, and at very light loads the ltc4090-3 can excite the ceramic capacitor at audio frequencies, generating audible noise. since the ltc4090-3 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. downloaded from: http:///
ltc4090-3 22 40903fb for more information www.linear.com/ltc4090-3 figure 5. transient load response of the ltc4090 high voltage regulator front page application as the load current is stepped from 500ma to 1500ma. figure 6. high voltage regulator burst mode operation high voltage regulator frequency compensation the ltc4090-3 high voltage regulator uses current mode control to regulate the output. this simplifies loop com- pensation. in particular, the high voltage regulator does not require the esr of the output capacitor for stability, so you are free to use ceramic capacitors to achieve low output ripple and small circuit size. frequency compensation is provided by the components tied to the v c pin, as shown in figure 1. generally a capacitor ( c c ) and a resistor ( r c ) in series to ground are used. in addition, there may be a lower value capacitor in parallel. this capacitor ( c f ) is not part of the loop compensation but is used to filter noise at the switching frequency, and is required only if a phase-lead capacitor is used or if the output capacitor has high esr. loop compensation determines the stability and transient performance. designing the compensation network is a bit complicated and the best values depend on the application and in particular the type of output capacitor. a practical approach is to start with the front page schematic and tune the compensation network to optimize performance. stability should then be checked across all operating con- ditions, including load current, input voltage and tempera- ture. the ltc1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. figure 5 shows the transient response when the load current is stepped from 500ma to 1500ma and back to 500ma. low ripple burst mode operation and pulse-skipping mode the ltc4090-3 is capable of operating in either low ripple burst mode operation or pulse-skipping mode which are selected using the sync pin. tie the sync pin below v syn- c,l ( typically 0.5 v) for low ripple burst mode operation or above v sync,h (typically 0.8v) for pulse-skipping mode. to enhance efficiency at light loads, the ltc4090 -3 can be operated in low ripple burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the ltc4090-3 deliver single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. because the ltc4090-3 delivers power to output with single, low current pulses, the output ripple is kept below 15 mv for a typical application. as the load current decreases towards a no load condition, the per- centage of time that the high voltage regulator operates in sleep mode increases and the average input current is greatly reduced resulting in high efficiency even at very low loads. see figure 6. at higher output loads ( above 70 ma for the front page application) the ltc4090-3 will be running at the frequency programmed by the r t resistor, and will be operating in standard pwm mode. the transition between pwm and low ripple burst mode operation is seamless, and will not disturb the output voltage. applications information 25s/div hvout 50mv/div i l 1a/div 40903 f05 figure 12 schematic 40903 f06 i l 0.5a/div v sw 5v/div v out 10mv/div 5s/div v in = 12v; figure 12 schematic i load = 10ma downloaded from: http:///
ltc4090-3 23 40903fb for more information www.linear.com/ltc4090-3 if low quiescent current is not required, the ltc4090-3 can operate in pulse-skipping mode. the benefit of this mode is that the ltc4090-3 will enter full frequency standard pwm operation at a lower output load current than when in burst mode operation. the front page application circuit will switch at full frequency at output loads higher than about 60ma.boost pin considerations capacitor c 2 ( see block diagram) and an internal diode are used to generate a boost voltage that is higher than the input voltage. in most cases, a 0.47 f capacitor will work well. the boost pin must be at least 2.3 v above the sw pin for proper operation. high voltage regulator soft-start the hven pin can be used to soft-start the high voltage regulator of the ltc4090-3, reducing maximum input current during start-up. the hven pin is driven through an external rc filter to create a voltage ramp at this pin. figure 7 shows the start-up and shutdown waveforms with the soft-start circuit. by choosing a large rc time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply 20a when the hven pin reaches 2.3v.synchronization and mode the sync pin allows the high voltage regulator to be synchronized to an external clock. synchronizing the ltc4090-3 internal oscillator to an external frequency can be done by connecting a square wave ( with 20% to 80% duty cycle) to the sync pin. the square wave amplitude should be such that the valleys are below 0.3 v and the peaks are above 0.8 v ( up to 6 v). the high voltage regulator may be synchronized over a 300khz to 2 mhz range. the r t resistor should be chosen such that the ltc4090-3 oscillates 25% lower than the external synchronization frequency to ensure adequate slope compensation. while synchronized, the high voltage regulator will turn on the power switch on positive going edges of the clock. when the power good ( pg) output is low, such as during start-up, short-circuit, and overload conditions, the ltc4090-3 will disable the synchroni- zation feature. the sync pin should be grounded when synchronization is not required.alternate ntc thermistors and biasing the ltc4090-3 provides temperature qualified charging if a grounded thermistor and a bias resistor are connected to ntc ( see figure 8). by using a bias resistor whose value is equal to the room temperature resistance of the thermistor ( r 25c ) the upper and lower temperatures are preprogrammed to approximately 45 c and 0 c, respec- tively (assuming a vishay curve 2 thermistor). the upper and lower temperature thresholds can be ad- justed by either a modification of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modified but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera - ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance - temperature conversion tables . the vishay-dale thermistor nths0603n02n1002j, used in the following examples, has a nominal value of 10 k and follows the vishay curve 2 resistance-temperature characteristic. the ltc4090-3?s trip points are designed applications information figure 7. to soft-start the high voltage regulator, add a resistor and capacitor to the hven pin 40903 f07 i l 1a/divhven 2v/div v out 2v/div hven gnd 0.22f run 15k 2ms/div downloaded from: http:///
ltc4090-3 24 40903fb for more information www.linear.com/ltc4090-3 to work with thermistors whose resistance-temperature characteristics follow vishay dale ?s r-t curve 2. the vishay nths0603 n 02 n 1002 j is an example of such a thermistor . however, vishay dale has many thermistor products that follow the r-t curve 2 characteristic in a variety of sizes. furthermore, any thermistor whose ratio of r cold to r hot is about 6.0 will also work ( vishay dale r-t curve 2 shows a ratio of 2.815/0.4839 = 5.82).in the explanation below, the following notation is used. r 25c = value of the thermistor at 25c r ntc|cold = value of thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point r cold = ratio of r ntc|cold to r 25c r hot = ratio of r ntc|hot to r 25c r nom = primary thermistor bias resistor (see figure 8) r 1 = optional temperature range adjustment resistor (see figure 9) the trip points for the ltc4090-3?s temperature quali- fication are internally programmed at 0.326 vntc for the hot threshold and 0.74 vntc for the cold threshold. therefore, the hot trip point is set when: r ntc|hot r nom + r ntc|hot vntc = 0.326 vntc and the cold trip point is set when: r ntc|cold r nom + r ntc|cold vntc = 0.74 vntc solving these equations for r ntc | cold and r ntc | hot results in the following: r ntc|hot = 0.484 r nom and r ntc|cold = 2.815 r nom by setting r nom equal to r 25c , the above equations result in r hot = 0.484 and r cold = 2.815. referencing these ratios to the vishay resistance-temperature curve 2 chart gives a hot trip point of about 45 c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 45c. by using a bias resistor, r nom , different in value from r 25c , the hot and cold trip points can be moved in either direction. the temperature span will change somewhat due to the nonlinear behavior of the thermistor. the following applications information figure 8. typical ntc thermistor circuit figure 9. ntc thermistor circuit with additional bias resistor ? + ? + r nom 10k r ntc 10k ntc vntc 6 0.1v ntc_enable 40903 f08 ntc block too_coldtoo_hot 0.738 ? vntc 0.326 ? vntc ? + 5 ? + ? + r nom 13.7k r ntc 10k r13.16k ntc vntc 6 0.1v ntc_enable 40903 f09 too_coldtoo_hot 0.738 ? vntc 0.326 ? vntc ? + 5 ntc block downloaded from: http:///
ltc4090-3 25 40903fb for more information www.linear.com/ltc4090-3 equations can be used to easily calculate a new value for the bias resistor: r nom = r hot 0.484 r 25c r nom = r cold 2.815 r 25c where r hot and r cold are the resistance ratios at the de- sired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 40 c hot trip point is desired. from the vishay curve 2 r-t characteristics , r hot is 0.5758 at 40 c. using the above equation, r nom should be set to 11.8k. with this value of r nom , the cold trip point is about ?4c. notice that the span is now 44 c rather than the previous 45 c. this is due to the increase in temperature gain of the thermistor as absolute temperature decreases. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor as shown in figure 9. the following formulas can be used to compute the values of r nom and r1: r nom = r cold ?r hot 2.815 r 25c r1 = 0.484 r nom ?r hot r 25c for example, to set the trip points to ?5c and 55 c with a vishay curve 2 thermistor choose r nom = 3.532 ? 0.3467 2.815 ? 0.484 10k = 13.7k the nearest 1% value is 13.7k. r1 = 0.484 13.7k ? 0.3467 10k = 3.16k the nearest 1% value is 3.16 k. the final solution is shown in figure 9 and results in an upper trip point of 55 c and a lower trip point of ?5c. power dissipation and high temperature considerations the die temperature of the ltc4090-3 must be lower than the maximum rating of 110 c. this is generally not a concern unless the ambient temperature is above 85 c. the total power dissipated inside the ltc4090-3 depend on many factors, including input voltage ( in or hvin), battery voltage, programmed charge current, programmed input current limit, and load current. in general, if the ltc4090-3 is being powered from in the power dissipation can be calculated as follows: p d = (v in ? v bat ) i bat + (v in ? v out ) i out where p d is the power dissipated, i bat is the battery charge current, and i out is the application load current. for a typical application, an example of this calculation would be : p d = (5 v ? 3.7 v ) 0.4 a + (5 v ? 4.75 v ) 0.1 a = 545mw this examples assumes v in = 5 v, v out = 4.75 v, v bat = 3.7v, i bat = 400 ma, and i out = 100 ma resulting in slightly more than 0.5w total dissipation. it is important to solder the exposed backside of the package to a ground plane. this ground should be tied to other copper layers below with thermal vias; these layers will spread the heat dissipated by the ltc4090-3. additional vias should be placed near the catch diode. adding more copper to the top and bottom layers and tying this copper to the internal planes with vias can reduce thermal resistance further. with these steps, the thermal resistance from die ( i.e., junction) to ambient can be reduced to ja = 40c/w. board layout considerations as discussed in the previous section, it is critical that the exposed metal pad on the backside of the ltc4090-3 package be soldered to the pc board ground. further- more, proper operation and minimum emi requires a careful printed circuit board ( pcb) layout. note that large, switched currents flow in the power switch ( between the hvin and sw pins), the catch diode and the hvin input capacitor. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components. the loop formed by these components should be as small as possible. applications information downloaded from: http:///
ltc4090-3 26 40903fb for more information www.linear.com/ltc4090-3 figure 10. suggested board layout additionally, the sw and boost nodes should be kept as small as possible. figure 10 shows the recommended component placement with trace and via locations. in and hvin bypass capacitor many types of capacitors can be used for input bypassing; however, caution must be exercised when using multilayer ceramic capacitors. because of the self-resonant and high q characteristics of some types of ceramic capacitors, high voltage transients can be generated under some start-up conditions, such as from connecting the charger input to a hot power source. for more information, refer to application note 88.battery charger stability considerations the constant - voltage mode feedback loop is stable without any compensation when a battery is connected with low impedance leads. excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1 f from bat to gnd. furthermore, a 4.7 f capacitor with a 0.2 w to 1 w series resistor to gnd is recommended at the bat pin to keep ripple voltage low when the battery is disconnected. applications information c1 and d1 gnd pads side-by-side and seperated with c3 gnd pad u1 thermal pad soldered to pcb. vias connected to all gnd planes without thermal relief minimize d1, l1,c3, u1, sw pin loop minimize trace length 4090 f10 figure 11. ground currents follow their incident path at high speed. slices in the ground plane cause high voltage and increased emissions. 4090 f11 high frequency currents, such as the high voltage input current of the ltc4090-3, tend to find their way along the ground plane on a mirror path directly beneath the incident path on the top of the board. if there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. if high frequency currents are not allowed to flow back through their natural least-area path, excessive voltage will build up and radiated emissions will occur. see figure 11. downloaded from: http:///
ltc4090-3 27 40903fb for more information www.linear.com/ltc4090-3 figure 12. 800khz switching frequency hvinhven in hpwr v c susptimer clprog prog r t pgsync sw high (7.5v to 36v) voltage input l1 6.8h 40903 f12 ltc4090-3 boost hvout hvpr out gate bat vntc ntc chrg c1 1f 50v 1206 0.1f 2.1k 1% 71.5k 1% 40.2k 1% 59k 1% 680 0.47f16v d1 c322f 6.3v 1206 4.7f6.3v 270pf li-ion battery 680 d: diodes inc. b360al: sumida cdr6d28mn-gr5 q1, q2: siliconix si2333ds 1k 10k1% q1 q2 10kt load + usb 4.7f6.3v hvin boost in sw 4.7f 4.7f q1 4.7f 1f timer clprog ltc4090-3 gnd prog hvout hvpr out bat 0.1f 330pf 71.5k 2.1k l: sumida cdrh8d28/hp-100 * use schottky diode rated at v r > 45v usb high (7.5v to 36v) transient to 60v* v c r t 88.7k 35k li-ion battery + 1k l 10h load 40903 tao3 0.47f hvin boost in sw 4.7f 22f q1 4.7f 1f timer clprog ltc4090-3 gnd prog hvout hvpr out bat 0.1f 330pf 71.5k 2.1k l: sumida cdrh4d22/hp-2r2 usb high (7.5v to 16v) voltage input v c r t 11.5k 30k li-ion battery + 1k load 40903 tao4 l 2.2h 0.47f figure 13. 400khz switching frequency figure 14. 2mhz switching frequency typical applications downloaded from: http:///
ltc4090-3 28 40903fb for more information www.linear.com/ltc4090-3 package description 3.00 0.10 (2 sides) note:1. drawing proposed to be made variation of version (wxxx) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters note: 1. dimensions are in millimeters 2. apply solder mask to areas that are not soldered 3. drawing is not to scale 0.40 0.05 pin #1 notchr0.30 typ or 0.25mm 45 chamfer bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.10 typ 1 22 1211 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (djc) dfn 0605 6.00 0.10 (2 sides) 0.25 0.05 0.889 0.889 0.50 bsc 5.35 0.10 (2 sides) r = 0.10 recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.70 0.05 3.60 0.05 packageoutline 0.25 0.05 0.50 bsc 5.35 0.05 (2 sides) 0.889 0.889 djc package 22-lead plastic dfn (6mm 3mm) (reference ltc dwg # 05-08-1714 rev ?) downloaded from: http:///
ltc4090-3 29 40903fb for more information www.linear.com/ltc4090-3 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 01/14 amended v out and v float values 3 b 03/15 corrected comparator hookup on block diagram 11 downloaded from: http:///
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